Makefile: remove the options target

The Makefile used to suppress output (by using @), so this target made sense at
the time.

But the Makefile should be simple and make debugging with less abstractions or
fancy printing.  The Makefile was made verbose and doesn't hide the build
output, so remove this target.

Prompted by a question on the mailing list about the options target.

diff --git a/Makefile b/Makefile
index 470ac86407bbd2876e3ee997e04e57649b51da9f..15db421c0e7b56e9196353ffc5b75f8ef1ba7194 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -7,13 +7,7 @@ include config.mk
 SRC = st.c x.c
 OBJ = $(SRC:.c=.o)
 
-all: options st
-
-options:
-       @echo st build options:
-       @echo "CFLAGS  = $(STCFLAGS)"
-       @echo "LDFLAGS = $(STLDFLAGS)"
-       @echo "CC      = $(CC)"
+all: st
 
 config.h:
        cp config.def.h config.h
@@ -54,4 +48,4 @@ uninstall:
        rm -f $(DESTDIR)$(PREFIX)/bin/st
        rm -f $(DESTDIR)$(MANPREFIX)/man1/st.1
 
-.PHONY: all options clean dist install uninstall
+.PHONY: all clean dist install uninstall